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general description the max4051/max4052/max4053 and max4051a/ max4052a/max4053a are low-voltage, cmos analog ics configured as an 8-channel multiplexer (max4051/a), two 4-channel multiplexers (max4052/a), and three sin- gle-pole/double-throw (spdt) switches (max4053/a). the a-suffix parts are fully characterized for on-resistance match, on-resistance flatness, and low leakage. these cmos devices can operate continuously with dual power supplies ranging from ?.7v to ?v or a single supply between +2.7v and +16v. each switch can handle rail-to-rail analog signals. the off-leakage current is only 0.1na at +25? or 5na at +85? (max4051a/max4052a/max4053a). all digital inputs have 0.8v to 2.4v logic thresholds, ensuring ttl/cmos-logic compatibility when using ?v or a single +5v supply. ________________________applications battery-operated equipment audio and video signal routing low-voltage data-acquisition systems communications circuits ____________________________features ? pin compatible with industry-standard 74hc4051/74hc4052/74hc4053 ? guaranteed on-resistance: 100 ? with 5v supplies ? guaranteed match between channels: 6 ? (max4051a?ax4053a) 12 ? (max4051?ax4053) ? guaranteed low off-leakage currents: 0.1na at +25? (max4051a?ax4053a) 1na at +25? (max4051?ax4053) ? guaranteed low on-leakage currents: 0.1na at +25? (max4051a?ax4053a) 1na at +25? (max4051?ax4053) ? single-supply operation from +2.0v to +16v dual-supply operation from 2.7v to 8v ? ttl/cmos-logic compatible ? low distortion: < 0.04% (600 ? ) ? low crosstalk: < -90db (50 ? ) ? high off-isolation: < -90db (50 ? ) max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 v+ no2 no1 no0 no3 adda addb addc no4 no6 com no7 no5 inh v- gnd top view max4051 dip/so/qsop logic 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 v+ comb comc noc ncc addc addb adda nob ncb noa coma nca inh v- gnd max4053 dip/so/qsop 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 v+ no2a no1a coma no0a no3a adda addb no0b no2b comb no3b no1b inh v- gnd max4052 dip/so/qsop logic ___________________________________pin configurations/functional diagrams 19-0463; rev 2; 10/05 part max4051a cpe max4051acse max4051acee 0? to +70? 0? to +70? 0? to +70? temp range pin-package 16 plastic dip 16 narrow so 16 qsop ordering information ordering information continued at end of data sheet. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ual supplies (v+ = +4.5v to +5.5v, v- = -4.5v to -5.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltages referenced to gnd v+ ........................................................................-0.3v to +17v v-..........................................................................+0.3v to -17v v+ to v- ................................................................-0.3v to +17v voltage into any terminal (note 1) ..........(v- - 2v) to (v+ + 2v) or 30ma (whichever occurs first) continuous current into any terminal..............................?0ma peak current, no or com (pulsed at 1ms, 10% duty cycle) .................................?00ma continuous power dissipation (t a = +70?) plastic dip (derate 10.53mw/? above +70?)............842mw narrow so (derate 8.70mw/? above +70?)..............696mw qsop (derate 8.00mw/? above +70?) .....................640mw cerdip (derate 10.00mw/? above +70?) ................800mw operating temperature ranges max405_c_ e/max405_ac_e .............................0? to +70? max405_e_ e/max405_ae_e...........................-40? to +85? max405_mje/max405_amje ........................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? conditions 60 100 v v- v+ v com , v no analog signal range ? 125 r on com?o on-resistance units min typ max (note 2) symbol t a = +25? c, e, m v+ = 5v, v- = -5v, i no = 1ma, v com = ?v t a = +25? 6 max4051a, max4052a, max4053a v+ = 5v, v- = -5v, i no = 1ma, v com = ?v t a = +25? ? 12 ? r on com?o on-resistance match between channels (note 3) max4051, max4052, max4053 v+ = 5.5v, v- = -5.5v, v no = 4.5v, v com = -4.5v m c, e -10 10 -100 100 max4051, max4052, max4053 t a = +25? v+ = 5v, v- = -5v, i no = 1ma, v com = -3v, 0v, 3v v+ = 5.5v, v- = -5.5v, v no = -4.5v, v com = 4.5v m na -100 100 i no(off) no off-leakage current (note 5) max4051a, max4052a, max4053a c, e t a = +25? -0.1 0.002 0.1 -5 5 t a = +25? ? 10 r flat(on) com?o on-resistance flatness (note 4) -1 0.002 1 max4051a, max4052a, max4053a c, e, m note 1: signals on any terminal exceeding v+ or v- are clamped by internal diodes. limit forward-diode current to maximum current rating. c, e, m 12 c, e, m 18 c, e, m 15 parameter analog switch
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches _______________________________________________________________________________________ 3 electrical characteristics?ual supplies (continued) (v+ = +4.5v to +5.5v, v- = -4.5v to -5.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) t a = +25? m -100 100 max4051a -1 0.002 1 c, e c, e t a = +25? conditions -0.1 0.002 0.1 -2.5 2.5 m c, e -10 10 -100 100 max4051 v+ = 5.5v, v- = -5.5v, v no = 4.5v, v com = -4.5v m c, e -5 5 -50 50 com off-leakage current (note 5) max4052, max4053 t a = +25? t a = +25? -0.1 0.002 0.1 units min typ max (note 2) symbol parameter m -5 5 -100 100 max4052a, max4053a -1 0.002 1 t a = +25? m -100 100 max4051a -1 0.002 1 c, e c, e t a = +25? -0.1 0.002 0.1 -2.5 2.5 m c, e -10 10 -100 100 max4051 v+ = 5.5v, v- = -5.5v, v no = -4.5v, v com = 4.5v m c, e na -5 5 -50 50 i com(off) max4052, max4053 t a = +25? t a = +25? -0.1 0.002 0.1 m -5 5 -50 50 max4052a, max4053a -1 0.002 1 t a = +25? m -100 100 max4051a -1 0.002 1 c, e c, e t a = +25? -0.1 0.002 0.1 -2.5 2.5 m c, e -10 10 -100 100 max4051 v+ = 5.5v, v- = -5.5v, v com = v no = ?.5v m c, e na -5 5 -50 50 i com(on) com on-leakage current (note 5) max4052, max4053 t a = +25? t a = +25? -0.1 0.002 0.1 m -5 5 -50 50 max4052a, max4053a -1 0.002 1
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 4 _______________________________________________________________________________________ note 2: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 3: ? r on = r on(max) - r on(min) . note 4: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., v no = 3v to 0v and 0v to -3v. note 5: leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at t a = +25?. note 6: guaranteed by design, not production tested. c, e, m v 2.4 v ih add, inh input logic threshold high t a = +25? t a = +25? conditions ns ns 75 250 t trans transition time figure 2 210 t open break-before-make delay figure 4 c, e, m t a = +25? ns 50 175 225 t on turn-on time (note 6) figure 3 t a = +25? pf 2 c no(off) no off-capacitance v no = gnd, f = 1mhz, figure 7 t a = +25? t a = +25? c, e, m v ?.7 ? v+, v- power-supply range -1 0.1 1 t a = +25? pf 2 c com(off) com off-capacitance units min typ max (note 2) symbol parameter v com = gnd, f = 1mhz, figure 7 pc 210 q charge injection (note 6) c l = 1nf, r s = 0 ? , v no = 0v, figure 5 c, e, m ? 10 i+ v+ supply current inh = add = 0v or v+ electrical characteristics?ual supplies (continued) (v+ = +4.5v to +5.5v, v- = -4.5v to -5.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) c, e, m v 0.8 v il add, inh input logic threshold low c, e, m ? -1 0.03 1 i ih , i il add, inh input current logic high or low v add , v inh = v+, 0v c, e, m t a = +25? ns 40 150 200 t off turn-off time (note 6) figure 3 t a = +25? pf 8 c (on) switch on-capacitance v com = v no = gnd, f = 1mhz, figure 7 t a = +25? db <-90 v iso off-isolation c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 t a = +25? -1 0.1 1 c, e, m ? -10 i- v- supply current inh = add = 0v or v+ t a = +25? db <-90 v ct channel-to-channel crosstalk c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 digital i/o switch dynamic characteristics power supply
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches _______________________________________________________________________________________ 5 electrical characteristics?ingle +5v supply (v+ = +4.5v to +5.5v, v- = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) c, e, m t a = +25? ? 125 225 analog signal range 280 r on com?o on-resistance v+ = 5v, i no = 1ma, v com = 3.5v c, e, m t a = +25? m conditions -100 100 v+ = 5.5v, v no = 4.5v, v com = 0v -1 0.002 1 c, e t a = +25? -1 0.002 1 -10 10 c, e t a = +25? -1 0.002 1 -10 10 v+ = 5.5v, v no = 4.5v, v com = 0v m m c, e -5 5 -50 50 v max4052/a, max4053/a t a = +25? m -100 100 t a = +25? v+ = 5.5v, v no = 0v, v com = 4.5v or 0v m na -50 50 i com(off) com off-leakage current (note 5) max4052/a, max4053/a -1 0.002 1 units min typ max (note 2) symbol parameter max4051/a -1 0.002 1 c, e na v- v+ v com , v no -10 10 -100 100 i no(off) no off-leakage current (note 5) v+ = 5.5v, v no = 0v, v com = 4.5v t a = +25? m -100 100 max4051/a -1 0.002 1 c, e t a = +25? -1 0.002 1 -10 10 c, e -5 5 v+ = 5.5v, v com = v no = 4.5v c, e t a = +25? -1 0.002 1 -10 10 m c, e -10 10 -100 100 max4051/a m na -100 100 i com(on) com on-leakage current (note 5) max4052/a, max4053/a c, e, m 0.8 c, e, m 2.4 v v v il v ih add, inh input logic threshold low add, inh input logic threshold high c, e, m -1 0.03 1 v add, v inh = v+, 0v ? i ih, i il add, inh input current logic high or low t a = +25? -1 1 inh = add = 0v or v+ ? i+ v+ supply current c, e, m 10 analog switch digital i/o power supply
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 6 _______________________________________________________________________________________ electrical characteristics?ingle +5v supply (continued) (v+ = +4.5v to +5.5v, v- = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) note 2: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 3: ? r on = r on(max) - r on(min) . note 4: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., v no = 3v to 0v and 0v to -3v. note 5: leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at t a = +25?. note 6: guaranteed by design, not production tested. t a = +25? c, e, m conditions ns 30 t open break-before-make delay figure 4 c, e, m t a = +25? t a = +25? ns ns 90 200 60 125 175 t off 275 t on turn-on time (note 6) figure 3 t a = +25? db <-90 v iso off-isolation c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 t a = +25? turn-off time (note 6) t a = +25? db <-90 v ct channel-to-channel crosstalk c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 figure 3 units min typ max (note 2) symbol parameter pc 210 q charge injection (note 6) c l = 1nf, r s = 0 ? , v no = 0v, figure 5 digital i/o switch dynamic characteristics
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches _______________________________________________________________________________________ 7 electrical characteristics?ingle +3v supply (v+ = +3.0v to +3.6v, v- = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) c, e, m t a = +25? ? v+ = 3.6v, v com = v no = 3v 250 525 analog signal range 700 r on com?o on-resistance i no = 1ma, v+ = 3v, v com = 1.5v c, e, m t a = +25? m conditions -100 100 v+ = 3.6v, v no = 3v, v com = 0v -1 0.002 1 c, e t a = +25? c, e -1 0.002 1 t a = +25? -10 10 -1 0.002 1 c, e t a = +25? -1 0.002 1 -10 10 v+ = 3.6v, v no = 3v, v com = 0v m -10 10 m c, e -5 5 -50 50 v m c, e -10 10 max4052/a, max4053/a t a = +25? m -100 100 t a = +25? v+ = 3.6v, v no = 0v, v com = 3v m -100 100 na -50 50 i com(off) com off-leakage current (note 5) max4052/a, max4053/a -1 0.002 1 units min typ max (note 2) symbol parameter max4051/a -1 0.002 1 max4051/a c, e na m na v- v+ v com , v no -100 100 -10 10 i com(on) com on-leakage current (note 5) max4052/a, max4053/a -100 100 i no(off) no off-leakage current (note 5) v+ = 3.6v, v no = 0v, v com = 3v t a = +25? m -100 100 max4051/a -1 0.002 1 c, e t a = +25? -1 0.002 1 -10 10 c, e -5 5 c, e, m 0.8 c, e, m 2.4 na v il v ih add, inh input logic threshold low add, inh input logic threshold high v v c, e, m -1 0.03 1 i ih, i il v add, v inh = v+, 0v add, inh input current logic high or low ? na t a = +25? -1 1 i+ inh = add = 0v or v+ v+ supply current ? c, e, m 10 analog switch digital i/o power supply
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 8 _______________________________________________________________________________________ electrical characteristics?ingle +3v supply (continued) (v+ = +3.0v to +3.6v, v- = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) t a = +25? c, e, m conditions ns 90 t open break-before-make delay figure 4 c, e, m t a = +25? t a = +25? ns ns 180 600 100 300 400 t off 700 t on turn-on time (note 6) figure 3 t a = +25? db <-90 v iso off-isolation c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 t a = +25? turn-off time (note 6) t a = +25? db <-90 v ct channel-to-channel crosstalk c l = 15pf, r l = 50 ? , f = 100khz, v no = 1v rms , figure 6 figure 3 units min typ max (note 2) symbol parameter pc 110 q charge injection (note 6) c l = 1nf, r s = 0 ? , v no = 0v, figure 5 note 2: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 3: ? r on = r on(max) - r on(min) . note 4: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges; i.e., v no = 3v to 0v and 0v to -3v. note 5: leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at t a = +25?. note 6: guaranteed by design, not production tested. digital i/o switch dynamic characteristics
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches _______________________________________________________________________________________ 9 110 30 -5 -3 1 on-resistance vs. v com (dual supplies) 50 90 max4051/2/3-toc1 v com (v) r on ( ? ) -1 3 70 100 40 80 60 5 -4 0 -2 2 4 v?= ?v v?= ?v 110 30 -5 -3 1 on-resistance vs. v com and temperature (dual supplies) 50 90 max4051/2/3-toc2 v com (v) r on ( ? ) -1 3 70 100 40 80 60 5 -4 0 -2 2 4 v+ = 5v v- = -5v t a = +125? t a = +85? t a = +25? t a = -55? 300 50 02 on-resistance vs. v com (single supply) 100 200 max4051/2/3-toc3 v com (v) r on ( ? ) 4 150 250 275 225 75 175 125 15 3 v+ = 3v v- = 0v v+ = 5v 180 02 on-resistance vs. v com and temperature (single supply) 100 max4051/2/3-toc4 v com (v) r on ( ? ) 4 60 140 160 120 80 40 15 3 t a = +25? t a = -55? t a = +85? t a = +125? v+ = 5v v- = 0v -5 -3 1 charge injection vs. v com -5 5 max4051/2/3-toc7 v com (v) qj (pc) -1 3 0 5 -4 0 -2 2 4 v+ = 5v v- = -5v v+ = 5v v- = 0v 0.1 off-leakage vs. temperature 1000 max4051/2/3-toc5 temperature ( c) off-leakage (pa) 10 1 100 -50 125 25 -25 0 75 50 100 v+ = 5.5v v- = -5.5v 0.1 on-leakage vs. temperature 1000 10,000 max4051/2/3-toc6 temperature ( c) on-leakage (pa) 10 1 100 -50 125 25 -25 0 75 50 100 v+ = 5.5v v- = -5.5v 0.1 supply current vs. temperature 10 max4051/2/3-toc8 temperature ( c) i+, i- (na) 1 -50 125 25 -25 0 75 50 100 v+ = 5v v- = -5v v en = v a = 0v, 5v i+ i- __________________________________________typical operating characteristics (v+ = +5v, v- = -5v, gnd = 0v, t a = +25?, unless otherwise noted.)
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 10 ______________________________________________________________________________________ ____________________________typical operating characteristics (continued) (v+ = +5v, v- = -5v, gnd = 0v, t a = +25?, unless otherwise noted.) _____________________________________________________________pin descriptions digital inhibit input. normally connect to gnd. can be driven to logic high to set all switches off. 6 6 negative analog supply voltage input. connect to gnd for single-supply operation. 7 7 ground. connect to digital ground. (analog signals have no ground reference; they are limited to v+ and v-.) 8 8 digital address ??input 9 digital address ??input 9 10 analog switch ??normally open input analog switch ??normally closed input analog switch ??normally open input analog switch ??normally closed input analog switch ??common 3 analog switch ??inputs 0? 1, 2, 4, 5 analog switch common 3 analog switch inputs 0? 1, 2, 4, 5, 12, 13, 14, 15 function analog switch ??normally closed input analog switch ??normally open input analog switch ??common digital address ??input 10 11 analog switch ??inputs 0? 11, 12, 14, 15 analog switch ??common 13 note: no, nc, and com pins are identical and interchangeable. any may be considered an input or output; signals pass equally well in both directions. inh 6 v- 7 gnd 8 addc 11 addb 10 nob 1 ncb 2 noa 3 nca 5 comb 15 no0b?o3b com no0?o7 name ncc 12 noc 13 comc 14 adda 9 no0a?o3a coma 4 max4051/ max4051a max4052/ max4052a max4053/ max4053a 0.01 10 100 1k 10k total harmonic distortion vs. frequency 0.1 max4051/2/3-10 frequency (hz) thd (%) 1 10 100 v?= ?v 600 ? in and out positive analog and digital supply voltage input 16 16 v+ 16 pin 0 -10 -90 0.01 0.1 1 10 100 300 frequency response -80 -70 max4051/2/3-09 frequency (mhz) loss (db) phase (degrees) -50 -60 -40 -20 -30 5 0 -40 -35 -30 -20 -25 -15 -5 -10 insertion loss 50 ? in/out off-isolation on phase
__________applications information power-supply considerations overview the max4051/max4052/max4053 and max4051a/ max4052a/max4053a construction is typical of most cmos analog switches. they have three supply pins: v+, v-, and gnd. v+ and v- are used to drive the inter- nal cmos switches and set the limits of the analog volt- age on any switch. reverse esd-protection diodes are internally connected between each analog signal pin and both v+ and v-. if any analog signal exceeds v+ or v-, one of these diodes will conduct. during normal operation, these (and other) reverse-biased esd diodes leak, forming the only current drawn from v+ or v-. virtually all the analog leakage current comes from the esd diodes. although the esd diodes on a given signal pin are identical, and therefore fairly well balanced, they are reverse biased differently. each is biased by either v+ or v- and the analog signal. this means their leakages will vary as the signal varies. the difference in the two diode leakages to the v+ and v- pins consti- tutes the analog signal path leakage current. all analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. this is why both sides of a given switch can show leakage cur- rents of either the same or opposite polarity. there is no connection between the analog signal paths and gnd. max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches ______________________________________________________________________________________ 11 x 1 table 1. truth table/switch programming x x all switches open all switches open all switches open 0 0 com?o0 comb?o0b, coma?o0a coma?ca, comb?cb, comc?cc 0 0 0 1 com?o1 comb?o1b, coma?o1a coma?oa, comb?cb, comc?cc 0 0 1 1 com?o3 comb?o3b, coma?o3a coma?oa, comb?ob, comc?cc 1 0 com?o2 comb?o2b, coma?o2a coma?ca, comb?ob, comc?cc 0 0 0 0 0 1 com?o5 comb?o1b, coma?o1a coma?oa, comb?cb, comc?oc 0 0 com?o4 comb?o0b, coma?o0a coma?ca, comb?cb, comc?oc 1 0 1 0 1 1 com?o7 comb?o3b, coma?o3a coma?oa, comb?ob, comc?oc 1 0 com?o6 comb?o2b, coma?o2a coma?ca, comb?ob, comc?oc 1 0 1 0 x = don? care * addc not present on max4052. note: no and com pins are identical and interchangeable. either may be considered an input or output; signals pass equally well in either direction. on switches address bits addb adda max4051/ max4051a max4052/ max4052a max4053/ max4053a addc* inh
max4051/a, max4052/a, max4053/a v+ and gnd power the internal logic and logic-level translators, and set both the input and output logic lim- its. the logic-level translators convert the logic levels into switched v+ and v- signals to drive the gates of the analog signals. this drive signal is the only connec- tion between the logic supplies (and signals) and the analog supplies. v+ and v- have esd-protection diodes to gnd. the logic-level thresholds are ttl/cmos compatible when v+ is +5v. as v+ rises, the threshold increases slightly, so when v+ reaches +12v, the threshold is about 3.1v; above the ttl-guaranteed high-level mini- mum of 2.8v, but still compatible with cmos outputs. bipolar supplies these devices operate with bipolar supplies between ?.0v and ?v. the v+ and v- supplies need not be symmetrical, but their sum cannot exceed the absolute maximum rating of +17v. single supply these devices operate from a single supply between +3v and +16v when v- is connected to gnd. all of the bipolar precautions must be observed. at room temper- ature, they actually ?ork?with a single supply at near or below +1.7v, although as supply voltage decreases, switch on-resistance and switching times become very high. overvoltage protection proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maxi- mum ratings, because stresses beyond the listed rat- ings can cause permanent damage to the devices. always sequence v+ on first, then v-, followed by the logic inputs (no) and by com. if power-supply sequencing is not possible, add two small signal diodes (d1, d2) in series with the supply pins for overvoltage protection (figure 1). adding diodes reduces the analog signal range to one diode drop below v+ and one diode drop above v-, but does not affect the devices?low switch resistance and low leakage characteristics. device operation is unchanged, and the difference between v+ and v- should not exceed 17v. these protection diodes are not recommended when using a single supply if signal levels must extend to ground. high-frequency performance in 50 ? systems, signal response is reasonably flat up to 50mhz (see typical operating characteristics ). above 20mhz, the on response has several minor peaks which are highly layout dependent. the problem is not turning the switch on, but turning it off. the off- state switch acts like a capacitor, and passes higher frequencies with less attenuation. at 10mhz, off isola- tion is about -45db in 50 ? systems, becoming worse (approximately 20db per decade) as frequency increases. higher circuit impedances also make off iso- lation worse. adjacent channel attenuation is about 3db above that of a bare ic socket, and is entirely due to capacitive coupling. low-voltage, cmos analog multiplexers/switches 12 ______________________________________________________________________________________ com no v- v+ * internal protection diodes d2 d1 external blocking diode external blocking diode v- v+ max4051/a max4052/a max4053/a * * * * figure 1. overvoltage protection using external blocking diodes
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches ______________________________________________________________________________________ 13 50% t trans v+ 0v v no0 v out v add 0v v no7 90% 90% t trans 50% t trans v+ 0v v no0 v out v add 0v v no3 90% 90% t trans 50% t trans v+ 0v v nc v out v add 0v v no 90% 90% t trans v+ v out v add v add v- gnd v+ addb v- addc adda inh no0 no1?o6 no7 com v+ v- max4051/a 300 ? 50 ? 35pf v+ v out v- gnd v+ addb v- adda inh no0 no1?o2 no3 com v+ v- max4052/a 300 ? 50 ? 35pf v+ v out v- gnd v+ v- add v add inh no nc com v- v+ max4053/a 300 ? 50 ? 35pf v- = 0v for single-supply operation. repeat test for each section. figure 2. address transition time ______________________________________________test circuits/timing diagrams
50% t off v+ 0v v no0 v out v inh 0v 90% 90% t on 50% t off v+ 0v v no0 v out v inh 0v 90% 90% t on 50% t off v+ 0v v no_ v out v inh 0v 90% 90% t on v+ v out v inh v inh v inh v- gnd v+ addb v- addc adda inh no0 no1?o7 com v+ max4051/a 300 ? 50 ? 35pf v+ v out v- gnd v+ addb v- adda inh no0 no1?o3 com v+ max4052/a 300 ? 50 ? 35pf v+ v out v- gnd v+ v- add inh no nc com v+ v- max4053/a 300 ? 35pf 50 ? v- = 0v for single-supply operation. repeat test for each section. figure 3. enable switching time max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 14 ______________________________________________________________________________________
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches ______________________________________________________________________________________ 15 50% v+ 0v v no_ v out v add 0v 80% t open v+ v out v add v add v add v- gnd v+ addb v- addc adda inh no0?07 com v+ max4051/a 300 ? 50 ? 35pf v+ v out v- gnd v+ addb v- adda inh no0?o3 com v+ max4052/a 300 ? 35pf v+ v out v- gnd v+ v- add inh no, nc com v+ max4053/a 300 ? 35pf 50 ? 50 ? v- = 0v for single-supply operation. repeat test for each section. t r < 20ns t f < 20ns figure 4. break-before-make interval 0v v+ v inh ? v out is the measured voltage due to charge transfer error q when the channel turns off. ? v out v- = 0v for single-supply operation. repeat test for each section. q = ? v out x c l v out v+ v out v no = 0v v inh v- gnd v+ addb v- addc channel select adda inh no com max4051/a max4052/a max4053/a 50 ? c l = 1000pf figure 5. charge injection
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 16 ______________________________________________________________________________________ measurements are standardized against short at socket terminals. off-isolation is measured between com and "off" no terminal on each switch. on-loss is measured between com and "on" no terminal on each switch. crosstalk (max4052 and max4053) is measured from one channel (a, b, c) to all other channels. signal direction through switch is reversed; worst values are recorded. v+ v out v in v- gnd v+ v in v out meas. network analyzer 50 ? 50 ? 50 ? off-isolation = 20log on-loss = 20log crosstalk = 20log 50 ? ref. addb v- v out v in v out v in addc channel select adda inh no com 10nf 10nf max4051/a max4052/a max4053/a figure 6. off-isolation, on-loss, and crosstalk v+ v- gnd v+ addb v- addc channel select 1mhz capacitance analyzer adda inh no no com max4051/a max4052/a max4053/a figure 7. no/com capacitance
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches ______________________________________________________________________________________ 17 16 cerdip** -55? to +125? max4052mje 16 qsop 16 narrow so -40? to +85? -40? to +85? max4052eee max4052ese dice* 16 qsop 0? to +70? 0? to +70? max4052c/d max4052cee 16 narrow so 16 plastic dip 0? to +70? 0? to +70? max4052cse max4052 cpe 16 plastic dip -40? to +85? max4052epe 16 cerdip** 16 qsop -40? to +85? -55? to +125? max4052amje max4052aeee 16 plastic dip 16 qsop 0? to +70? -40? to +85? max4052aepe max4052acee 16 narrow so 16 plastic dip 0? to +70? 0? to +70? max4052acse max4052a cpe 16 narrow so -40? to +85? max4052aese 16 cerdip** 16 qsop -40? to +85? -55? to +125? max4051mje max4051eee 16 narrow so -40? to +85? max4051ese 16 plastic dip dice* 0? to +70? -40? to +85? max4051epe max4051c/d 16 qsop 16 narrow so 16 plastic dip 0? to +70? 0? to +70? 0? to +70? max4051cee max4051cse max4051 cpe 16 cerdip** 16 qsop -40? to +85? -55? to +125? max4051amje max4051aeee 16 narrow so 16 plastic dip pin-package temp range -40? to +85? -40? to +85? max4051aese max4051aepe part 16 cerdip** -55? to +125? max4053mje 16 qsop 16 narrow so -40? to +85? -40? to +85? max4053eee max4053ese dice* 16 qsop 0? to +70? 0? to +70? max4053c/d max4053cee 16 narrow so 16 plastic dip 0? to +70? 0? to +70? max4053cse max4053 cpe 16 plastic dip -40? to +85? max4053epe 16 cerdip** 16 qsop -40? to +85? -55? to +125? max4053amje max4053aeee 16 plastic dip 16 qsop 0? to +70? -40? to +85? max4053aepe max4053acee 16 narrow so 16 plastic dip 0? to +70? 0? to +70? max4053acse max4053a cpe 16 narrow so -40? to +85? max4053aese pin-package temp range part * contact factory for dice specifications. ** contact factory for availability. chip information transistor count: 161 substrate connected to v+. ___________________________________________ordering information (continued)
max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches 18 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) pdipn.eps
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600___________________ 19 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products. qsop.eps e 1 1 21-0055 package outline, qsop .150", .025" lead pitch soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations: package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) max4051/a, max4052/a, max4053/a low-voltage, cmos analog multiplexers/switches

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